Advances in computer technology have led to increasing numbers of components being placed on a computer chip. Processor architecture has advanced from having one processor per chip to having multiple processors on a computer chip. Each processor may be multi-stranded. In a multi-stranded processor, two or more hardware threads of execution (strands) may concurrently exist on the processor. In some multi-stranded architectures, two or more hardware threads executing on a processor may each have their own registers, while functional units, such as an execution unit, are shared. In a processor configured for chip multiprocessing (CMP), two or more processor cores exist on the same processor chip. While each core may have a first level cache, the cores may share a second level cache. Strands from a first core execute independently of strands from a second core, though they may interact through shared memory, including the second level cache. A processor may combine chip multiprocessing and hardware multi-stranding, having two or more multi-stranded cores on a single processor.
In course-grained multi-stranding, a strand may use a functional unit until it stalls, such as upon a memory access. At that point, another strand is selected to execute. A context switch from the first strand to the second strand may involve saving the useful states of the first strand and restoring new states to the second strand. When the first strand restarts after stalling, the saved states are returned and the first strand proceeds. In fine-grained multi-stranding, a strand may be selected to execute at a cycle boundary. In horizontal multi-stranding, a group of strands share a pipeline, and different strands may be scheduled on different functional units of the pipeline at the same time. Multiple strands may execute simultaneously, as long as there is no conflict for a shared resource.
Computer system processors consume a significant amount of power. High power consumption can generate large amounts of heat. Mechanisms for dissipating heat can require additional power consumption. The consumption of power, as well as the generation and dissipation of heat can adversely affect computer systems in a number of ways, such as reduction of battery life, wear on components, operational costs, and the like. Increases in complexity and number of components in processors tend to exacerbate problems of power consumption and management of power usage. In multi-stranded computer systems, problems related to power consumption may be further exacerbated, due to the maximized use of processors and components.
Operating systems typically perform a scheduling process, in which software threads are assigned to execute on processor strands. The way a system schedules threads may affect the performance of individual applications, the entire system, or portions thereof.
Generally, it is desirable to employ improved techniques for managing power usage in a computer system, and in particular a multithreaded computer system. Improved techniques for scheduling threads in a multi-stranded computer system are also desirable. Therefore, it is with respect to these considerations and others that the present invention has been made.